Abstract

The miniaturization of integrated circuit elements and the expansion of chip sizes leading to very large-scale integration (VLSI) and wafer scale integration (WSI) have created a situation in which the speed of information processing for modern computing systems has become limited by communication delays rather than gate propagation delays for logic devices. The data communication limitation on processing speed has led to considerable interest in new methods for interconnection at nearly every level of computer hierarchy. While many researchers have proposed optical solutions to interconnection and communication problems at the chip, board, and backplane levels, the integration of fast photodetectors within a chip package has yet to be accomplished. The development of such devices is crucial to the feasibility of optical interconnection at hierarchical levels below the backplane connection.

© 1988 Optical Society of America