Expand this Topic clickable element to expand a topic
Skip to content
Optica Publishing Group

Optoelectronic shuffle-exchange network for multiprocessing architectures

Not Accessible

Your library or personal account may give you access

Abstract

A shuffle-exchange network based on free-space optical interconnects is proposed for multiprocessor architectures. The processing elements (PEs) are arrayed on a planar rectilinear grid. For packet switching applications, an optical source/detector pair is located at each PE. A folded perfect shuffle (FPS) optical system,1 located above the plane, uses reflective or folded optics to shuffle the array of sources onto the array of detectors. The exchange/bypass function is performed electronically on each pair of PEs. If M source/detector pairs are located at each PE site, then a single FPS optical network can be used for pipelining M stages, effectively forming M interleaved arrays of the N PEs. For each pair of PEs, M electronic exchange/bypass switches route the signals from the output detector of one stage to an input source of the next. The interconnect latency of the network is therefore limited to M times the optical delay in the FPS system. The source/detector arrays are interleaved such that the two-dimensional space- bandwidth product (SBP) of the optical system is most effectively utilized. For example, if N = 1024 and M = log2(N), then the SBP requirement is NM, or about 100 100.

© 1990 Optical Society of America

PDF Article
More Like This
Optoelectronic Shuffle-Exchange Network for Multiprocessor Architectures

Michael W. Haney
WE19 Photonic Switching (PS) 1991

Cascadable optical shuffle-exchange network

Michael W. Haney, James J. Levy, and Ravindra A. Athale
TuX3 OSA Annual Meeting (FIO) 1990

Select as filters


Select Topics Cancel
© Copyright 2024 | Optica Publishing Group. All rights reserved, including rights for text and data mining and training of artificial technologies or similar technologies.