Expand this Topic clickable element to expand a topic
Skip to content
Optica Publishing Group

Design-Space Exploration for CMOS Photonic Processor Networks

Not Accessible

Your library or personal account may give you access


Monolithically integrated dense WDM photonic network topologies optimized for loss and power footprint of optical components can achieve up to 4× better energy-efficiency and throughput than electrical interconnects in core-to-core, and 10× in core-to-DRAM networks.

© 2010 IEEE Communications Society, IEEE Photonics Society, OSA, Telcordia

PDF Article
More Like This
Manycore Processor Networks with Monolithic Integrated CMOS Photonics

Vladimir Stojanović, Ajay Joshi, Christopher Batten, Yong-jin Kwon, and Krste Asanović
CTuC3 Conference on Lasers and Electro-Optics (CLEO:S&I) 2009

Architectural Design Exploration of Chip-Scale Photonic Interconnection Networks Using Physical-Layer Analysis

Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, and Keren Bergman
OThX4 Optical Fiber Communication Conference (OFC) 2010

Efficient Topologies for Large-scale Cluster Networks

John Kim, William J. Dally, and Dennis Abts
OMV1 Optical Fiber Communication Conference (OFC) 2010

Select as filters

Select Topics Cancel
© Copyright 2024 | Optica Publishing Group. All rights reserved, including rights for text and data mining and training of artificial technologies or similar technologies.