Abstract

As VLSI chip sizes and device densities increase, signal communication limitations begin to dominate system perfomance¹,². By replacing particular electronic transmission lines with optical signal paths, perfomance can be improved in terms of speed, alleviation of clock skew and a reduction in silicon area devoted to interconnects. These improvements can be achieved for on chip or chip-to-chip communication, but become dramatically evident for wafer scale communication. At the wafer scale level, global interconnections are infeasible to perform electronically due to the line lengths and complexity involved. In addition, arrays of parallel processing elements are utilized in order to alleviate problems of yield. The use of optical interconnections would allow for the interconnection of these processing elements in a global highly parallel manner (such as hypercube and butterfly machines) that are difficult to achieve electronically³. However, in this case the optical system must be able to handle a large number of sources, each requiring a large fanout. Highly complex interconnection schemes can be achieved with the use of a holographic optical element (HOE) for free space optical interconnections.

© 1987 Optical Society of America