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High-Speed 2-D CMOS Designs of Bypass-and-Exchange Switch Arrays for Free-Space Optoelectronic MINs

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Abstract

In a free-space optoelectronic multistage interconnection network, electronic bypass-and- exchange switches are required to do the local routing. It has been shown that for a MIN with N inputs and outputs, the bandwidth and the power consumption are optimized if the electronic switch planes are partitioned into N switches [1]. Thus, each switch has N inputs and N outputs and is defined as N×N switch. Two separate circuits, that use an optimized 2-D layout and are compatible with the Optical Transpose Interconnection System (OTIS) have been designed and analyzed. The first design (design A) was used as a proof of concept for the optimized 2-D layout, the second design (design B) is a bi-directional self-routing concept that uses 3 level logic.

© 1995 Optical Society of America

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