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Abstract
We describe the structure, fabrication, and measured performance of a 1543 nm wavelength photonic crystal surface emitting laser. An asymmetric double lattice design was used to achieve single mode lasing with side mode suppression ratios >40 dB. The photonic crystal was formed using encapsulated air holes in an n-doped InGaAsP layer with an InGaAlAs active layer then grown above it. In this way a laser with a low series resistance of 0.32 Ω capable of pulsed output powers of 171 mW at 25 °C and 40 mW at 85 °C was demonstrated.
© 2024 Optica Publishing Group under the terms of the Optica Open Access Publishing Agreement
1. Introduction
Photonic crystals (PC) are periodic structures with a tailored refractive index, they exhibit remarkable optical characteristics that can be exploited for manipulating light at the nanoscale. Recent advances in lithography and semiconductor fabrication techniques, have enabled the integration of two-dimensional PCs into semiconductor laser devices. These developments have led to the emergence of Photonic Crystal Surface Emitting Lasers (PCSELs) as promising laser sources that exhibit unique properties compared to conventional edge emitting lasers [1,2]. Thanks to the 2D PC, extra degrees of freedom can be accessed to engineer PCSEL devices and enable key advantages including top or bottom surface emission, highly collimated beams, power scaling with area, and beam pattern and steering functionality.
PCSELs have also been shown to be a platform technology that can be implemented across a wide range of semiconductor materials including InGaAs/GaAs (900-1000 nm wavelength), InGaAsP/InP (1.3-1.6 µm wavelength) and InGaN/GaN (400-530 nm wavelength). Remarkable progress has been made in GaAs based PCSELs that have a double lattice PC layer on the p-side of the active region with output powers and slope efficiencies (SE) in excess of 50 W and 0.7 W/A respectively [3]. While a GaN based PCSEL with a double lattice PC layer on the n-side of the active layer gave 1 W of output power at 7 A at 431 nm wavelength [4].
For InP based PCSELs continuous wave (CW) output powers up to 250 mW with 0.21 W/A SE were recently achieved at 1.33 µm using a double lattice PC [5]. However, at around 1.55 µm wavelength, despite the potential for applications in telecommunications and light detection and ranging (LiDAR) [6] the progress until recently has been slower with output powers and efficiencies significantly lower than the highest reported at 1.3 µm. Recently there has been significant progress reported in 1.55 µm wavelength PCSELs. An NPN-type PCSEL was reported where the PC layer was formed above the multiple quantum well (MQW) in n-doped material to avoid a roughened MQW due to growth above a PC while a PN junction was formed under the MQW to avoid strong attenuation of the emitted light passing through a p-doped InP substrate [7]. Up to 120 mW pulsed output power was measured at 3.5 A and 25 °C at 1560 nm with a SE of 0.056 W/A and a differential resistance of 1.4 Ω. In another recent report, a PC formed above the MQW in p-doped InGaAsP was employed in a PCSEL operating at 1581 nm wavelength [8]. A relatively high pulsed slope efficiency of 0.21 W/A was achieved and a measured pulsed output power of almost 170 mW was obtained at 1 A and 27 °C, although the associated voltage was quite high at approximately 2.8 V at 1 A.
In this paper we describe 1.55 µm double lattice PCSELs where the air holes are defined in an n-doped InGaAsP PC layer. This approach avoids the design trade-off between higher in plane optical loss and higher series resistance inherent in the use of a p-doped PC layer formed after the MQW growth in a PCSEL on InP, but does necessitate challenging epitaxy steps to grow an MQW above and in quite close proximity to the PC [9]. As a result, our design achieved single mode CW operation with output powers of up to 81 mW and 171 mW at room temperature in CW and pulsed condition.
2. Design and fabrication
There have been several recent demonstrations of PCSELs operating at around 1.3 µm wavelength in which the PC patterns were formed as holes in an n-doped InGaAsP layer with the laser active layer and p-doped layers then grown after the holes were encapsulated [5,10,11]. A similar approach was adopted here, but because the required hole size for a given fill factor (FF) approximately scales with wavelength a challenge with these longer wavelength PCSELs is that the process needs to be capable of encapsulating larger holes. A range of single and double lattice PC designs were used with FF ranging from 11.3% to 17.4%. Simple slab mode waveguide analysis suggested that over this FF range the optical confinement factor in the quantum wells of the completed device would have reached a plateau value while the confinement factor within the PC layer decreases with increasing FF. For operation in the 1.55 µm wavelength telecommunications C band photonic crystal pitches (a) of 474 nm and 477 nm were used.
Figure 1(a) is a schematic of the structure used. It contains an n-doped InGaAsP PC layer that was grown by metal organic vapour phase epitaxy (MOVPE) on an n-doped InP substrate. Electron beam lithography was used to define 200 µm x 200 µm PC patterns with square unit cells. Two different values of the offset (d) between lattices in the double lattice design were used as shown in Fig. 1(b) [12,13]. Reactive Ion Etching (RIE) was then used to transfer the pattern from resist to dielectric mask.
Fig. 1. (a) Schematic cross section of the PCSEL design used. (b) Examples of two of the circle - circle double lattice PC designs used.
The holes were then etched using an inductively coupled plasma process. A target etch depth of 0.8 µm was used with the intention of etching through the n-doped InGaAsP PC layer and into the n-doped InP below for the larger holes. Scanning electron microscope (SEM) cross-sectional profiles after etching were observed using focused ion beam microscopy (FIB) for single and double lattice PCs are shown in Fig. 2(a) top and bottom images respectively. The smooth, vertically deep holes are well defined becoming narrower at the bottom to enhance asymmetry in vertical direction [14]. The etch depth can be up to ∼1 µm deep for holes ∼ 200 nm diameter. The smaller diameter holes resulted in shallower etch depths. Adjusting PC sizes to create asymmetric etch depth, can encourage single mode operation in large area PCs [12].
Fig. 2. FIB SEM images of single lattice and double lattice PCs that had FF of 17.4% by design (a) after etching, (b) after encapsulation regrowth, (c) after second stage regrowth.
Two stages of MOVPE regrowth were employed in this work. Firstly, the holes were encapsulated by growing a thin layer of InP. FIB SEM images of the encapsulated holes are shown in Fig. 2(b). The holes are now deformed due to the effects of the growth temperature but the diameter of the top part of the hole remains similar to target design. The infilled InP above the hole is ∼200-250 nm thick. This infill material thickness depends strongly on the dimension of the holes, with larger diameter holes having a thicker layer of infilled InP above them. After encapsulation regrowth, the wafer underwent a second regrowth process to grow the InGaAlAs multiple quantum well (MQW) laser active layer, InGaAlAs separate confinement heterostructure (SCH) layers, p-doped InP cap and p-doped InGaAs contact layer. Cross section FIB images after the second regrowth are shown in Fig. 2(c). The images show that the hole shapes are well maintained. The InP spacer thickness between top of the hole and MQW is now between 230-300 nm. The increase in spacer thickness is due to additional InP grown at the start of the second regrowth and better contrast in SEM for thickness measurement.
After both the first and second regrowths, optical images under Nomarski interference contrast and atomic force microscopy (AFM) were used to assess the surface quality of an infilled double lattice PC with 17.4% FF. AFM images are shown in Fig. 3. A root mean square roughness Rq of 0.19 nm is obtained after the first the regrowth. The corresponding Rq on an unpatterned region of the wafer with no underlying PC was 0.16 nm showing that the PC encapsulation had produced a surface similar to normal epitaxial growth. After the second regrowth, the surface above a double lattice PC with 17.4% FF had a measured Rq of 0.17 nm which was the same as measured in the area without PC at that stage. These roughness values are slightly less than previously reported in 1.3 µm wavelength PCSELs with n-side PCs [10].
Fig. 3. 3D roughness images from AFM of the double lattice devices with 17.4% FF (a) after the encapsulation regrowth, (b) after full stack regrowth.
Room temperature photoluminescence (PL) measurements were conducted on test regions of the wafer with and without underlying PC patterns after the p-InGaAs contact layer and the p-InP had been wet etched from these PL test regions. The spectra, shown in Fig. 4 for two single lattice PC regions of different pitch, show that when the resonant wavelength of the PC pattern was within the range where the MQW had gain it gave rise to a resonance in the PL spectra, Fig. 4(a). When the PC resonance was at much shorter wavelengths than the MQW gain, Fig. 4(b) the peak PL intensity reached 73% of that of the PL spectra from the adjacent region of the wafer with no underlying PC. In prior work to improve the two regrowths the amplitude of the type of resonance seen in Fig. 4(a) was used as a metric for the strength of coupling between the gain layer and the PC while the PL intensity of the out of band PC region relative to the no PC region seen in Fig. 4(b) was used a metric for the MQW material quality. It is considered that there is still some scope to further improve this PL ratio and hence the MQW material quality beyond what has been achieved here as a higher ratio was previously reported [10].
Fig. 4. PL spectra of single lattice PC regions that had FF of 11.3% by design (dashed lines) compared with PL spectra of adjacent regions with no PC (solid lines) (a) with 477 nm PC pitch, (b) with 408 nm PC pitch.
An isolation trench through the p-doped layers was defined just outside the PC region to prevent lateral current leakage beyond the PC region where it would be wasted. Circular p-contact windows of 120 µm diameter were defined. P-side TiPtAu metal was deposited using a sputtering technique. The wafer was then thinned to 125 µm and then n-side metal was patterned and deposited using an electron-beam evaporator leaving 300 µm diameter circular apertures for n-side optical emission. An anti-reflection dielectric layer was then deposited over the n-side aperture using a low temperature e-beam evaporator.
3. Measurements
Individual PCSEL chips were bonded p-side down onto Si submounts ahead of testing. A cantilever probe set up was used to contact the submounts and the emitted optical power was measured using an integrating sphere. Initially PCSELs all with 120 µm diameter contact windows but having a range of double lattice PC designs were tested under CW operation at a submount temperature of 25 °C up to 700 mA. A comparison of the maximum output optical powers over this range is plotted in Fig. 5(a). The pitch of a = 477 nm gave higher powers than the equivalent shorter wavelength PCSELs with a = 474 nm, while the highest powers were achieved in the PC design where the double lattice offset was d = 0.25a.
Fig. 5. (a) CW output power at 25 °C of double lattice designs. Key; blue diamonds d = 0.25a and a = 477 nm, red open circles d = 0.45a and a = 474 nm, green circles d = 0.45a and a = 477 nm. (b) Microscope image of the PCSEL bonded p-side down onto a Si carrier.
The device with the highest output power, which had a d = 0.25a double lattice PC, was then CW tested up to a higher current, Fig. 6(a). The SE over the first 100 mA above threshold was 0.11 W/A. The differential resistance was very low at 0.32 Ω including the resistance of the submount and wirebonds. This low resistance led to a low voltage at 1 A of 1.14 V despite the relatively low p-contact window diameter of 120 µm. It also helps increase and broaden the peak of power conversion efficiency (PCE) as plotted in Fig. 6(b) to up to 7.8% (CW). This is thought to be the highest reported PCE for PCSELs operating in either the C or L telecommunications wavelength bands whether considering CW or pulsed results.
CW spectra were measured for the same d = 0.25a PCSEL and high side mode suppression ratios (SMSR) of 41 dB at 10 mA above the threshold current, 63 dB at 400 mA and 61 dB at 1000 mA were obtained, Fig. 7(a). The CW spectral characteristics were investigated over a temperature range from 25 °C to 65 °C and showed SMSR >45 dB at fixed current over this range, Fig. 7(b).
Fig. 7. Spectral measurements of a d = 0.25a PCSEL (a) at 25 °C key; red line at 10 mA above threshold current, green line at 400 mA and blue line at 1000 mA. (b) Over temperature from 25 °C to 65 °C in 10 °C steps at fixed current of 646 mA.
The far-field intensity mode profile of the same d = 0.25a PCSEL was then measured, Fig. 8. A single lobed profile was obtained with measured full width at half maximum intensity (FWHM) far-field mode diameters of around 2.6 degrees.
The same PCSEL whose CW characteristics are shown in Fig. 6 and Fig. 7 was then measured up to higher currents and over a range of submount temperatures under pulsed conditions. The pulse duration was 10 µs and the duty cycle was 4%. Results plotted in Fig. 9 show powers of up to 171 mW and 123 mW were measured at 1.75 A when the submount temperature was 25 °C and 55 °C respectively.
4. Conclusion
A PCSEL with an n-side PC operating in the 1.55 µm wavelength band with an output optical power of 171 mW has been described. The device exhibited low resistance and low voltage operation leading to a PCE of up to 7.8% (CW). To our knowledge this is the highest reported PCE for a PCSEL operating in either the C or L telecommunications wavelength bands. Higher optical output powers than this have been reported for distributed feedback (DFB) lasers at L-band wavelengths [15]. However, design and process optimisation can still be considered to further improve the PCSEL performance at this wavelength beyond that reported here. The approach of increasing PCSEL size to boost the output power is discussed in [2] and was employed in high power GaAs PCSELs where the resonant diameter was increased to 3 mm [3]. Previously published simulations of PCSELs predicted lower in plane loss as the gap between the PC and the active layer is reduced and as the diameter of the resonator is increased [4]. So, it may be possible to lower the in-plane loss and so increase the SE of 1.55 µm PCSELs beyond that reported here by reducing the infill material thickness to improve optical coupling between the PC and the MQW and by increasing the p-contact window diameter and PC size from the relatively low values used. In addition, the PL measurements in Fig. 4 suggest that there may be scope for further optimising of the MQW growth above the PC to realise higher PL intensity and higher internal quantum efficiency which would lead to higher output powers and efficiencies from the PCSEL device.
Disclosures
The authors declare no conflicts of interest.
Data availability
Data supporting the results presented in this paper are not publicly available but may be obtained from the authors upon reasonable request.
References
1. S. Noda, T. Inoue, M. Yoshida, et al., “High-power and high-beam-quality photonic-crystal surface-emitting lasers: a tutorial,” Adv. Opt. Photonics 15(4), 977–1032 (2023). [CrossRef]
2. W. Zhou and M. Pan, “The future of photonic crystal surface-emitting lasers,” Appl. Phys. Lett. 123(14), 140501 (2023). [CrossRef]
3. M. Yoshida, S. Katsuno, T. Inoue, et al., “High-brightness scalable continuous-wave single-mode photonic-crystal laser,” Nature 618(7966), 727–732 (2023). [CrossRef]
4. K. Emoto, T. Koizumi, M. Hirose, et al., “Wide-bandgap GaN-based watt-class photonic-crystal lasers,” Commun. Mater. 3(1), 72 (2022). [CrossRef]
5. M. Ogasawara, Y. Itoh, N. Kono, et al., “High-Power 1.3 µm Wavelength Operation of Asymmetric Double-Lattice Photonic-Crystal Surface-Emitting Lasers,” CLEO, paper SF1Q.6 (2023).
6. M. Yoshida, M. De Zoysa, K. Ishizaki, et al., “Photonic-crystal lasers with high-quality narrow-divergence symmetric beams and their application to LiDAR,” J. Phys. Photonics 3(2), 022006 (2021). [CrossRef]
7. M. Hitaka, K. Hirose, T. Sugiyama, et al., “1.5 µm wavelength NPN-type photonic-crystal surface-emitting laser exceeding 100 mW,” Opt. Express 31(11), 18645–18653 (2023). [CrossRef]
8. L.-R. Chen, C.-J. Chang, Y. -J. Wu, et al., “Metal Organic Chemical Vapor Deposition-Grown High-Power Photonic-Crystal Surface-Emitting Lasers toward L Band,” Cryst. Growth Des. 23(11), 8132–8138 (2023). [CrossRef]
9. C. R. Hedlund, J. M. De Pina, A. Kalapala, et al., “Buried InP/Airhole Photonic-Crystal Surface-Emitting Lasers,” Phys. Status Solidi A 218, 2000416 (2021). [CrossRef]
10. Y. Itoh, N. Kono, N. Fujiwara, et al., “Continuous-wave lasing operation of 1.3 µm wavelength InP-based photonic crystal surface-emitting lasers using MOVPE regrowth,” Opt. Express 28(24), 35483–35489 (2020). [CrossRef]
11. Y. Itoh, N. Kono, D. Inoue, et al., “High-power CW oscillation of 1.3 µm wavelength InP-based photonic-crystal surface-emitting lasers,” Opt. Express 30(16), 29539–29545 (2022). [CrossRef]
12. M. Yoshida, M. De Zoysa, K. Ishizaki, et al., “Double-lattice photonic-crystal resonators enabling high-brightness semiconductor lasers with symmetric narrow-divergence beams,” Nat. Mater. 18(2), 121–128 (2019). [CrossRef]
13. T. Inoue, M. Yoshida, M. De Zoysa, et al., “Design of photonic-crystal surface-emitting lasers with enhanced in-plane optical feedback for high-speed operation,” Opt. Express 28(4), 5050–5057 (2020). [CrossRef]
14. K. Hirose, Y. Liang, Y. Kurosaka, et al., “Watt-class high-power, high-beam-quality photonic-crystal lasers,” Nat. Photonics 8(5), 406–411 (2014). [CrossRef]
15. Y. Mao, Y. Cheng, Y. Li, et al., “High Power Uncooled CW-DFB lasers with High Reliability,” OFC, paper M4C.2 (2023).
