Abstract

Co-packaged optics (CPO) technology is well positioned to break through the bottlenecks that impede efficient bandwidth scaling in key near-term commercial integrated circuits. We begin by providing some historical context for this important sea change in the optical communications industry. Then, motivated by GPU-based accelerated computing requirements, we investigate the next pain points that are poised to constrain bandwidth and efficiency in future CPO-based systems. We identify 2.5D integrated optics (i.e., bringing optics onto the interposer) as a promising solution that can enable continued scaling for these systems due to the dense wiring available which facilitates more efficient slow-and-wide electrical interfaces. We explore the benefits, challenges, and requirements associated with such tight coupling of the processors and optical engines by considering high-level photonic link design, technology, and packaging. We demonstrate the viability of a control loop which can adequately regulate temperature within the aggressive thermal environment. Then, we introduce a custom simulation framework that allows quantified comparisons of detailed design decisions; the simulations validate the feasibility of the general approach while also providing key guidance to designers on best directions to pursue for efficient optimization.

High-density and wide-bandwidth optical interconnects with silicon optical interposers [Invited]

Yutaka Urino, Tatsuya Usuki, Junichi Fujikata, Masashige Ishizaka, Koji Yamada, Tsuyoshi Horikawa, Takahiro Nakamura, and Yasuhiko Arakawa
Photon. Res. 2(3) A1-A7 (2014)

Detachable interface toward a low-loss reflow-compatible fiber coupling for co-packaged optics (CPO)

Yinchao Du, Feng Wang, Ziming Hong, Yuechun Shi, Xiangfei Chen, and Xuezhe Zheng
Opt. Express 31(2) 1318-1329 (2023)

Reimagining Datacenter Topologies With Integrated Silicon Photonics

Cyriel Minkenberg, Nathan Farrington, Aaron Zilkie, David Nelson, Caroline P. Lai, Dan Brunina, Jerry Byrd, Bhaskar Chowdhuri, Nick Kucharewski, Karl Muth, Amit Nagra, German Rodriguez, David Rubi, Thomas Schrans, Pradeep Srinivasan, Yeong Wang, Chiang Yeh, and Andrew Rickman
J. Opt. Commun. Netw. 10(7) B126-B139 (2018)

Reconfigurable 100  Gb/s Silicon Photonic Network-on-Chip [Invited]

Po Dong, Young-Kai Chen, Tingyi Gu, Lawrence L. Buhl, David T. Neilson, and Jeffrey H. Sinsky
J. Opt. Commun. Netw. 7(1) A37-A43 (2015)

Monolithic silicon-photonic platforms in state-of-the-art CMOS SOI processes [Invited]

Vladimir Stojanović, Rajeev J. Ram, Milos Popović, Sen Lin, Sajjad Moazeni, Mark Wade, Chen Sun, Luca Alloatti, Amir Atabaki, Fabio Pavanello, Nandish Mehta, and Pavan Bhargava
Opt. Express 26(10) 13106-13121 (2018)