1. Introduction

Advanced modulation formats are key enablers to increase the capacity of optical communication networks [1,2]. Polarization-division-multiplexed quadrature phase-shift keying (PDM-QPSK) has received significant attention in the optical communication industry as a de facto standard for 100-Gb/s optical transport networks. Currently, LiNbO₃-based modulators together with passive discrete optical components are used to generate the 100-Gb/s signals at the transmitter. In shorter-reach applications such as metro and access networks, compact, low-power consumption and cost effective transceivers are desired. Photonic integrated circuits (PICs) are suitable to fulfill these requirements in future coherent optical systems.

InP-based PICs have been demonstrated to provide high-speed modulators [3,4], wavelength multiplexing filters, and integrated lasers on the same chip [5]. For example, 10-channel 112-Gb/s PDM-QPSK chips have been reported in Ref [5]. However, on-chip polarization rotators and combiners have not been demonstrated on InP-based coherent-transmitter PICs [5], which is partially due to the difficulties to realize these functionalities in InP waveguides.

Emerging silicon photonics technologies promise a powerful PIC platform to realize many new integrated functionalities [6,7]. The high-index-contrast silicon waveguides enable these optical components with extremely compact sizes. The use of mature microelectronics fabrication infrastructures promises large-scale PICs with high yield and low cost. Further integration of silicon PICs with CMOS driver circuits leads to even more complex functions with low power consumption and low packaging cost. In particular, high-index contrast silicon waveguides inherently support hybrid optical modes, allowing efficient polarization rotation, splitting and combination [8,9]. This capability of polarization manipulation is particularly attractive for dual-polarization coherent receivers and transmitters. For examples, silicon PIC-based dual-polarization coherent receivers have been demonstrated in Ref [10].

Silicon waveguide modulators were extensively investigated in the last few years to improve the modulation rates and reduce the drive voltages [11–20]. Most of the reported silicon modulators focused on on-off-keying (OOK) modulation format. Recently, we presented single-polarization QPSK modulation based on both silicon Mach-Zehnder modulators (MZMs) [21] and microring modulators [22]. In Ref [21], we demonstrated 50-Gb/s QPSK based on a pair of nested single-drive push-pull silicon MZMs. The penalty of optical signal to noise ratio (OSNR) is ~1 dB more than that for a commercial LiNbO₃ QPSK modulator. In this paper, by further integrating two QPSK modulators and a polarization rotator (PR) and a polarization beam combiner (PBC) in silicon, we implemented a monolithic single-chip PDM-QPSK transmitter to demonstrate 112-Gb/s PDM-QPSK. This demonstration verifies that silicon PICs are able to monolithically integrate more optical elements such as PR and PBC, which has not been achieved in InP-based coherent transmitters.

2. Silicon PIC

This silicon PIC consists of four single-drive push-pull Mach-Zehnder modulators (MZMs), multiple phase shifters with integrated silicon heaters, a PR, and a PBC. A photograph of the fabricated PIC together with its schematic layout is shown in Figs. 1(a) and 1(b), respectively. The overall chip size is 1.4 mm x 13 mm. The PIC is fabricated on a 200-mm silicon-on-insulator (SOI) wafer with a buried oxide thickness of 3 μm and a silicon thickness of 220 nm in a CMOS-compatible fab. The detailed fabrication has been reported in [15]. The PIC was packaged with a printed circuit board (Fig. 1(e)) with four RF drive inputs and multiple DC controls.

 

Fig. 1 Silicon-PIC PDM-QPSK modulator. (a) Photograph of the PIC. PR: polarization rotator; PBC: polarization beam combiner. (b) Schematic layout of the silicon PIC. (c) Schematic of the PR, adapted from Ref [9]. (d) Schematic of the PBC. (e) Photograph of the packaged silicon PIC with a printed circuit board (PCB).

Download Full Size | PDF

The silicon MZMs employ a reverse-biased PN junction embedded in the waveguide. High-speed modulation is achieved by modulating the junction’s depletion widths such that the effective index of the silicon waveguide is changed. Two arms of MZMs are configured to facilitate single-drive push-push operation [18, 20]. The MZMs here have identical designs with those reported in Ref [18], where the device parameters can be found. The modulators have a V_π of ~10 V, an on-chip insertion loss of ~4.2 dB, and a modulation rate up to 30 Gb/s.

The operation of PR (Fig. 1(c)) is based on adiabatic mode evolution using the broken horizontal and vertical symmetry in the waveguide cross-section, achieved through a tapered SiN waveguide on top of the silicon waveguide [9]. The PBC is implemented by a simple directional coupler. For submicron silicon waveguides, the fundamental TE and TM modes have very different effective index and mode field, due to the difference between the waveguide width (~0.5 μm) and height (~0.22 μm). With same gaps, the TM-mode coupling between two adjacent waveguides can be significantly larger than that for TE. Using this property, it is feasible to design directional couplers which have >95% coupling efficiency for TM mode but <5% for TE mode. Such directional couplers can be also used as polarization filters and polarization splitters. In order to further increase polarization extinction ratios, multiple directional couplers can be used (shown in Fig. 1(d)). By combining polarization beam splitter (PBS) with PR, Ref [9]. reported a polarization-diversity circuit with a 1.5 dB insertion loss and >30 dB polarization extinction ratios over a 60-nm spectral range. In our current device, all the devices parameters are the same as those in Ref [9].

3. Experimental setup

Figure 2 shows the experimental setup for PDM-QPSK generation. The in-phase/quadrature (I/Q) drive signals use the same 28-Gb/s pseudorandom bit sequence (PRBS) of length 2¹⁵–1 from a pattern generator with a 64-bit delay. The signals are then amplified individually by two electrical amplifiers for a peak-to-peak voltage of ~12 V. Each signal is then split into two copies and a 33-bit delay is introduced between them. The resultant four RF signals were used to drive four MZMs. A continuous-wave (CW) laser of 1540.0 nm was launched into the device in the TE mode. We cascaded two erbium-doped fiber amplifiers (EDFAs) together with a variable optical attenuator (VOA) and a tunable optical filter to adjust the optical signal-to-noise ratios (OSNRs) into the receiver. The signal is mixed in polarization diversity 90° optical hybrids with a local oscillator (LO) from the same laser as the signal (homodyne detection), and detected with four balanced photo-detectors. The signals from photo-detectors were captured by a real-time 80-GSamples/s digital sampling oscilloscope. The performance of the signal was analyzed with offline processing.

 

Fig. 2 Experimental setup for characterizing the packaged silicon PIC. (a) Electrical drive signals. (b) Optical setup. MZM: Mach-Zehnder modulator; PC: polarization controller; VOA: variable optical attenuator; EDFA: erbium doped fiber amplifier; LO: local oscillator; DSP: digital signal processing.

Download Full Size | PDF

For the offline digital signal processing (DSP) algorithms, the sampling skew was first corrected and the signal was synchronously sampled to 2 samples per symbol. A butterfly equalizer with 19 taps adapted via the constant modulus algorithm (CMA) was used for polarization demultiplexing and inter-symbol interference compensation [23]. Carrier phase estimation was performed with the Viterbi & Viterbi algorithm [24]. Differential decoding was used in the detection and bit error ratios (BERs) were calculated using direct error counting.

4. 56-Gb/s single-polarization QPSK

As shown in the schematic layout in Fig. 1(b), we designed a 2x2 coupler before the PR for one of the two QPSK modulators, which allows the output of single-polarization QPSK. By adjusting the thermal phase shifters in the device, we achieved the optical spectrum for QPSK in Fig. 3(a) . The suppression of the carrier is one characteristic of QPSK signals. The low sideband peaks result from the fact that the drive voltage of ~8 V is lower than the V_π of ~10 V. Nevertheless, the constellation diagram in Fig. 3(b) after coherent detection and offline DSP clearly demonstrates the successful generation of 56-Gb/s QPSK. The performance of BER versus OSNR is shown in Fig. 3(c). At a BER of 10⁻³, the required OSNR is 14.8 dB, which is 4.0 dB away from the theoretical limit. In our previous demonstration of 50-Gb/s QPSK [21], the OSNR penalty was 2.7 dB. The smaller drive voltage and higher-speed operation in this paper contribute to the higher OSNR penalty.

 

Fig. 3 Single-polarization QPSK. (a) QPSK optical spectrum (resolution bandwidth is 0.01 nm). (b) QPSK constellation at an OSNR of 31 dB. (c) BER as a function of OSNR (0.1-nm noise bandwidth).

Download Full Size | PDF

5. 112-Gb/s PDM-QPSK

Next, we move to dual-polarization QPSK. Since both PR and PBC are passive devices, no additional tuning is required. Figures 4(a-b) depict the constellations for both polarizations. The constellation diagrams here include the degradations from polarization crosstalk and power imbalance between the two polarizations. In order to achieve a BER of 10⁻³, the OSNR needs to be ~18.8 dB, which is 4.9 dB away from the theoretical limit (Fig. 4(c)). Comparing Fig. 4(c) with Fig. 3(c), an extra 0.9-dB penalty occurs due to the presence of PR and PBC.

 

Fig. 4 112-Gb/s PDM-QPSK generation. (a) and (b) PDM-QPSK constellations at an OSNR of 31 dB. (c) BER as a function of OSNR (0.1-nm noise bandwidth).

Download Full Size | PDF

The insertion losses of PR and PBC mainly induce excess loss for TM polarization, which produces power imbalance between the two polarizations. This excess loss was measured as ~2 dB. The measurement was carried out by demultiplexing the two polarizations through adjusting the polarization controller before the coherent receivers and comparing the optical signal power of two polarizations from the real-time waveforms. The effect of this loss is equivalent to that of a PDM transmitter with an equal power in the two polarizations going through a polarization dependent loss (PDL) device, where the two polarizations of the signal are aligned with the axes of the PDL device. The effects of PDL on PDM-QPSK transmission have been theoretically investigated in Ref [25]. Due to this power imbalance, the two polarizations have different OSNRs. The TM polarization has a lower OSNR and thus higher BER, whereas the TE polarization has a higher OSNR and lower BER. The average BER is mainly determined by the higher BER, and thus the overall performance is degraded. Figure 5 shows the simulated power imbalance induced OSNR penalty under this condition. With a 2-dB power imbalance, the theoretical OSNR penalty is ~0.6 dB, which agrees well with our experimental results. Intuitively, under the conditions that the power is balanced in two polarizations and the overall OSNR is P₀ in dB, the signal for each polarization has an OSNR of ~(P₀ – 3) dB. If there is a 2-dB power imbalance, the OSNR for TM is ~(P₀ – 4.1) dB, while the OSNR for TE is ~(P₀ – 2.1) dB. The OSNR penalty for TM would be 1.1 dB but for TE there will be a 0.9-dB gain. The average OSNR penalty is about 0. 6 dB.

 

Fig. 5 Power imbalance induced OSNR penalty at BER = 10⁻³ for 112-Gb/s PDM-QPSK.

Download Full Size | PDF

6. Discussion and conclusion

We have successfully demonstrated a 112-Gb/s PDM-QPSK modulation from a monolithic silicon PIC which consists of high-speed silicon MZMs, a polarization rotator and a polarization combiner. This result illustrates that the silicon PIC is a promising candidate to drive commercial high-capacity coherent transmitters. The total on-chip insertion loss (excluding coupling losses to the fibers) are estimated as ~10 dB, which includes a ~4.2-dB modulator loss, a ~4.6-dB excess loss for 112-Gb/s PDM-QPSK from the fact that the drive voltage is far below 2V_π, and a 0.9-dB loss from polarization rotation and multiplexing (average over two polarizations). In addition, the current device suffers from very high V_π for the modulators. We believer that the QPSK performance may be further improved by employing low-V_π silicon MZMs such as previously reported in [20] (a V_π of 3.1 V has been achieved for 30-Gb/s operation). Recently, >40-Gb/s silicon modulators have been also reported [17, 19, 20], but all have very high V_π. Further reduction of V_π to 2-3 V for >40 Gb/s is preferred for next-generation coherent optical transponders.