1. Introduction

Silicon photonics have generated a huge interest in the past decade, with impressive optical interconnect results highlighted in particular by the InTernational Roadmap for Semiconductors (ITRS) [1]. Indeed, copper interconnects do not fulfill future datacoms centers’ requirements in terms of bandwidth and power consumption. Silicon photonics, thanks to the possibility of integrating electronics and photonics on the same platform and developing high speed and low loss optoelectronic devices, is a good candidate to replace copper for long intra- and inter-chip interconnects. Numerous impressive demonstrations of individual optoelectronic devices have been published prior to their actual integration in high speed optical links on silicon platforms. That includes III-V bonded [2,3] or germanium [4,5] lasers on silicon, electro-refraction modulators based on the carrier depletion [6–11], the Franz Keldysh [12,13] or the quantum confined stark [14,15] effects and germanium photo-detectors [16–21]. More and more complex circuits including optical emitters and receivers have been demonstrated in order to address ultra-high bit rate on-chip optical communications. The bandwidths of individual building blocks for these demonstrations were limited to 10Gbit/s or 25Gbit/s per wavelength [22–24].

In this paper, we demonstrated a single wavelength optical link based on the coupling of light from a 40Gbit/s silicon modulator based on carrier depletion in a pn junction to a 40Gbit/s germanium photo-detector integrated in a Silicon-On-Insulator (SOI) waveguide. Both optoelectronic devices have been separately fabricated in a 300-mm Complementary Metal Oxide Semiconductor (CMOS) pilot line. However, an integration of both optoelectronic devices using a common process may not induce supplementary complexity.

In CMOS technology, the 200mm platform manufactures products up to the 0.13µm node. On the other hand, the 300mm platform availability corresponds chronologically to the 90nm technology node. 300mm wafer foundries are therefore more focused on the development of processes for that node and below. Processes in 300mm foundries are thus meant to be more accurate in order to comply with the needs of more aggressive nodes, to date the 14nm node. Besides taking advantage of a bigger production yield, silicon photonics would therefore benefit in 300 mm from a better process accuracy. Accurate CMOS processes such as material deposition, lithography and etching are however usually associated with thin layers and small objects. Thus, the simple reuse of some CMOS processes is not always straight forward. Consequently, a process re-adaptation or even a change in process strategy must therefore be implemented. Nevertheless, the use of such a technological platform opens the route towards high volume production and use of optical interconnects in data centers. In addition, fabrication of photonic devices using a 300 mm CMOS platform also enables the future use of state of the art technological tools such as immersion lithography, leading to sub-50-nm resolution with few nm alignment tolerances between two technological levels. Furthermore, a better thickness uniformity of the silicon top layer is achieved during wafer manufacturing on 300 mm as compared to 200 mm SOI wafers, which may induce a better uniformity at the wafer scale.

The paper is organized as follows: section 2 shows the main features of the carrier depletion pn optical modulator. Section 3 presents the performances of the Ge photo-detectors integrated at the end of SOI waveguides. Finally, section 4 reports on the coupling between both optoelectronic devices linked by a single mode optical fiber.

2. Optical modulator

Carrier depletion optical modulators based on lateral pn junctions were used in this work. Modulators were fabricated using 300mm SOI wafers with 220nm thick top Si and 2µm thick BOX layers. A schematic view of the phase shifter is shown in Fig. 1. The waveguide width and the etching depth were 400 nm and 120 nm, respectively. The phase modulation occurred along the waveguide and its efficiency was optimum thanks to the optimization of the overlap between the depletion region in the vicinity of the pn junction and the optical mode. Implanted ions concentrations of p-doped and n-doped regions were 5 × 10¹⁷ cm⁻³ and 10¹⁸ cm⁻³, respectively. Thick highly doped p + + and n + + contacts were used in order to reduce the overall series resistance of the diode. Doping concentrations for both P + + and N + + contacts were higher than 10¹⁹ cm⁻³. The position of these doped regions was designed to avoid any guided mode propagation loss.

 

Fig. 1 Schematic views of the lateral pn diode phase shifter. The waveguide height and width were 220-nm and 400-nm, respectively. The doping levels of p- and n-doped regions were 5 × 10¹⁷ cm⁻³ and 10¹⁸ cm⁻³, respectively. Highly p + + and n + + doped regions were also used to reduce the series resistance of the diode.

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PN diode was integrated in both arms of 0.95 mm long asymmetric Mach-Zehnder Interferometers (MZI) in order to convert phase modulation induced by carrier depletion into intensity modulation. The phase shifter length was used to combine good performance and low insertion loss. One arm of the MZI was electrically driven by the Radio-Frequency (RF) electrical signal, using coplanar waveguide electrode (CPW) whose dimensions were optimized to achieve a characteristic impedance of 50 ohms taking into account the integration of the phase shifter, and a diode capacitance of 0.21 fF/µm. The signal electrode width and the gap between signal and ground electrodes were then chosen equal to 7.5 µm and 22.5 µm, respectively. S-parameter measurements have shown a S₁₁ below 25 dB up to 50 GHz, demonstrating the good impedance matching of the structure when a 50 ohms load is used at the output of the modulator.

Firstly, a SiO₂ layer was deposited on the top silicon surface to act as a hard mask. Standard 193 nm deep-UV optical lithography and reactive ion etching were used to define the waveguides, followed by four optical lithography and ions implantation steps to define the diodes. Finally, a W/Cu/Al metal stack was used to contact the heavily doped regions with silicidation and thus define the electrodes. Thanks to the accuracy alignments of lithography levels, pn junctions were well defined to induce the maximum effect in the designed waveguides.

First, the optical modulator was characterized alone. A linearly Transverse Electric (TE)-polarized light beam was coupled in/out of the waveguide using grating couplers. From basic straight waveguide structure, coupling loss was estimated to be about 4 dB including grating coupler loss and transition loss to a single-mode waveguide. The propagation loss of the silicon waveguide itself was lower than 1 dB/cm. The on-chip insertion loss of our 0.95 mm long pn Mach-Zehnder modulator was 4.1 dB (maximum transmission). This loss included the 2.6 dB active region loss (phase shifter loss) and the 1x2 Multi-Mode Interferometer (MMI) loss of 0.75 dB per splitter. Additional loss of 0.8 dB has to be factored in due to the operating wavelength for data transmission measurement because π-phase shift was not achieved with 0.95-mm long Mach-Zehnder modulators. V_πL_π of 2.2 V.cm was also determined from optical measurements.

RF electrical probes coupled with bias-Tee were used to bias the diode, to apply the RF signal to the modulator and to load the device with external 50 ohms load through a Direct Current (DC) block. First, high-speed performances of the modulators were determined by measuring the electro-optic bandwidth with a lightwave component analyzer (LCA - Agilent 86030A). Figure 2(a) shows the normalized optical response of the modulator as a function of frequency. The measured 3 dB cut-off frequency was 26 GHz. Data transmission characteristics were also determined using a pseudo random binary sequence (PRBS) electrical signal with a 2⁷-1 pattern length coupled with a RF amplifier to deliver about 7 V peak-to-peak and a bias-Tee to adjust the DC reverse voltage. The output light was then collected by a single mode fiber and injected in a 32 GHz Agilent photodiode connected to a sampling oscilloscope. An Erbium Doped Fiber Amplifier (EDFA) was used to achieve the high signal to noise ratio required for high speed measurements. A wavelength filter was then added to eliminate a large part of the amplified spontaneous emission noise from the EDFA. Figure 2(b) shows a 43 Gbit/s eye diagram with extinction ratio higher than 8 dB.

 

Fig. 2 Frequency characteristics of our MZI silicon modulator based on carrier depletion in a pn diode: (a) Normalized optical response as a function of frequency. The cut-off frequency was 26GHz. (b) Eye diagrams at 40 Gbit/s of MZI with 0.95 mm long phase shifter. It can be noticed that 40Gbit/s eye diagram has been measured without averaging, filtering and normalization. The reverse DC bias voltage was 4V and the RF voltage swing was about 7V.

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2. Germanium photodetector

Lateral pin Ge photodiodes were integrated at the end of silicon waveguides [Fig. 3(a)]. Their designs were similar to the one published in ref. 18. The doping levels of both p and n regions were 1.10¹⁹ cm⁻³. The intrinsic region width of the pin diode was 700 nm, enabling high speed operation. The total length of the Ge photo-detector was 10µm. As for the Si modulator, the Ge photo-detector was fabricated with standard microelectronic tools and processes on 300 mm SOI wafers with top Si and BOX layers of 220 nm and 2 µm, respectively. More than a micron of Ge was selectively grown into Si recesses (remaining Si thickness inside the recess: 70 nm) at the end of our SiO₂ – covered Si waveguides. Chemical Mechanical Polishing (CMP) was used afterwards to recover a flat surface and deliver the 300 nm thick Ge layers aimed for. Metallic contacts on both p- and n-doped Ge regions were fabricated by etching 0.4x0.4µm via holes. Ti/TiN was then deposited prior to filling with tungsten (W), followed by a last CMP step. Ti/TiN/AlCu metal stack was then deposited and patterned to define RF electrodes.

 

Fig. 3 (a) Schematic view of the lateral pin Ge photodetector integrated in a Si waveguide. Intrinsic region width was 700-nm and photo-detector length was 10µm. Both p- and n- doping levels were 1.10¹⁹ cm⁻³. (b) Typical current-voltage curve. Under illumination, reverse current dramatically increased.

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Dark current was determined as a function of voltage [Fig. 3(b)]. Dark current was as low as 6 nA under −1V, which is the lowest value reported so far for lateral pin Ge photodetectors. Under illumination, photo-generated current were collected with a responsivity of about 0.5 A/W. As for the optical modulator, light coupling was performed using a grating coupler with losses below 4dB.

Frequency bandwidth has been determined using 67-Ghz LCA from Agilent. Figure 4 presents the normalized electrical response (S₂₁) as a function of frequency. Cut-off frequency over 40GHz was obtained under 3V reverse bias. Such measurements proved that our lateral pin Ge diodes are able to detect 40 Gbit/s signals.

 

Fig. 4 Normalized optical responses as a function of frequency under 0V, −1V and −2V bias at the 1.55 µm wavelength. The photodetector length was 10 µm and the intrinsic region width was 700 nm.

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3. 40-Gbit/s optical link

Both Si pn modulator and Ge photodetector have exhibited good characteristics up to 40Gbit/s. In order to demonstrate the capability of building a point to point 40Gbit/s optical link, we have connected both optoelectronic devices with an optical fiber as reported in Fig. 5. EDFA was used to facilitate the measurements and to be above the detection threshold of the sampling oscilloscope. The photo-detector was directly connected to the sampling oscilloscope with a RF cable. Furthermore, all measurements were performed without any averaging.

 

Fig. 5 (top) Set-up used to couple the carrier depletion pn Si modulator and the Ge waveguide photo-detector. (Bottom) 40Gbit/s eye diagram recorded by the sampling oscilloscope from the Ge detector.

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First, the global optical loss of such an optical link was not optimized. It is especially the case for grating couplers, which induced about 4 dB losses per coupler (i.e. 12 dB for light coupling). Using optimized grating couplers, a reduction of such loss down to 3 dB is realistic (1 dB per coupler). When adding additional loss due to waveguide propagation (<1dB) and insertion loss of the optical modulator, total loss was lower than 18 dB for such an optical link. Figure 5 shows the 40Gbit/s eye diagram recorded by the sampling oscilloscope. Such results demonstrated that 40-Gbit/s data transmission per wavelength is achievable with silicon photonics building blocks.

4. Conclusion

In conclusion, 40Gbit/s point to point optical link was demonstrated by coupling carrier depletion Si optical modulator based on pn junction and lateral pin Ge waveguide photo-detector. Both optoelectronic devices were fabricated with a 300 mm pilot line. The Si optical modulator demonstrated high extinction ratio (> 8 dB), low insertion loss (~4.1 dB) and good efficiency (V_πL_π of 2.2 V.cm). A low dark current (few nA under −1V), a moderate responsivity (~0.5A/W) and a bandwidth above 40GHz under few volts were associated with our Ge photo-detector integrated at the end of a Si waveguide. This demonstration opens up the route towards high speed optical Si photonics circuits operating at 40Gbit/s per wavelength.