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Hardware-efficient signal generation of layered/enhanced ACO-OFDM for short-haul fiber-optic links

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Abstract

Layered/enhanced ACO-OFDM is a promising candidate for intensity modulation and direct-detection based short-haul fiber-optic links due to its both power and spectral efficiency. In this paper, we firstly demonstrate a hardware-efficient real-time 9.375 Gb/s QPSK-encoded layered/enhanced asymmetrical clipped optical OFDM (L/E-ACO-OFDM) transmitter using a Virtex-6 FPGA. This L/E-ACO-OFDM signal is successfully transmitted over 20-km uncompensated standard single-mode fiber (S-SMF) using a directly modulated laser. Several methods are explored to reduce the FPGA’s logic resource utilization by taking advantage of the L/E-ACO-OFDM’s signal characteristics. We show that the logic resource occupation of L/E-ACO-OFDM transmitter is almost the same as that of DC-biased OFDM transmitter when they achieve the same spectral efficiency, proving its great potential to be used in a real-time short-haul optical transmission link.

© 2017 Optical Society of America

1. Introduction

As bandwidth demands from data centers and end users are increasing rapidly, optical orthogonal frequency division multiplexing (OOFDM), also known as discrete multi-tone (DMT), has been explored as a candidate to upgrade the data rate in short-haul optical communication systems because advanced modulation formats such as M-QAM can be easily modulated onto OFDM subcarriers to achieve high spectral efficiency [1,2]. Intensity modulation with direct detection (IMDD) is preferable for short-haul optical links due to its compactness, especially when a directly modulated laser (DML) is used. Non-negative signals are required in IMDD based optical links, however, OFDM signals are bipolar. A straightforward way to generate non-negative OFDM signals is to add a direct current (DC) bias. This scheme is usually called DC-biased optical OFDM (DCO-OFDM). Several DCO-OFDM (DCO hereafter) experiments have been experimentally demonstrated using off-line digital signal processing (DSP) [3,4]. However, the drawback of using DCO is also very clear. From the perspective of optical power, DCO is not efficient as its DC component does not carry any information. Asymmetrical clipped optical OFDM (ACO-OFDM) [5] was proposed to improve the optical energy efficiency of optical OFDM. However, the clipping operation introduces distortion terms that then require the sacrifice of half of the sub-carriers, and therefore halving spectral efficiency compared to DCO. Consequently, to achieve the same capacity as DCO, ACO-OFDM (ACO hereafter) requires either the bandwidths of the electrical and optical devices to be doubled, or the use of higher-order constellations, which then requires higher signal to noise ratios. Recently, layered/enhanced asymmetrically clipped OFDM (L/E-ACO-OFDM) was proposed and simulated [6–9], with results showing that this technique could improve the spectral efficiency of ACO towards that of DCO, while still maintaining a power advantage. An L/E-ACO-OFDM (EACO hereafter) experiment was conducted using off-line DSP to explore its power advantage compared with DCO [10]. However, as off-line DSP does not take any practical hardware implementation issues into account, the overall system performance needs to be evaluated in a real-time transmission experiment. For DCO, there have been many real-time demonstrations in the transmitter [11,12], receiver [13] and transceiver [14,15] using field-programmable gate arrays (FPGA). Because a more complicated DSP algorithm is used in the transceiver for EACO, its logic resource occupation in the implementation needs to be optimized in a real-time optical communication system, in order to evaluate the practicality of using this OFDM variant in real optical links.

In this paper, a real-time EACO transmitter is firstly demonstrated using a Virtex-6 FPGA. A short version of this paper was presented at OFC 2017 [16]. Here, we extend our work by improving the hardware efficiency of the FPGA-based EACO transmitter. By using 2-radix IFFT module, we firstly experimentally show that the logic resource occupation for the EACO transmitter is just slightly larger, compared with a DCO transmitter, considering the utilization of both multipliers and adders. Besides, we also evaluate the power budget and analyze the limiting factor on Q-factor performance in a transmission experiment. In the transmission experiment, a 25 GSa/s MICRAM DAC with 5-bit resolution is used to generate the laser drive signal. A net data rate of 9.375 Gb/s is achieved when QPSK is encoded on the subcarriers. This EACO optical signals are successfully transmitted over 20-km standard single mode fiber (S-SMF) in a DML-based IMDD optical communication system.

2. EACO-OFDM algorithm

EACO and its variants [6–9] are all based on ACO. In ACO, the time domain signal has a half-wave anti-symmetry, so no information is lost by clipping all the negative parts to be zero [5]. In the frequency domain, only the odd subcarriers are used; the distortion generated by clipping the signals below their mean level falls only on where even subcarriers should be; thus, the spectral efficiency is reduced by half compared to DCO. EACO allows the even-frequency subcarriers to be used, by adding a clipping distortion cancellation algorithm in the receiver, which removes the odd subcarriers (denoted as Layer 1) and their clipping distortion from the even frequencies. Thus, the even subcarrier frequencies can be allocated for data transmission. However, not all of the even frequencies are available in the Layer 2. Layer 2 uses only the 2 × odd subcarriers (i.e. subcarriers 2, 6, 10, etc.), because their clipping distortion will fall on 2 × multiple subcarriers (i.e. subcarriers 4, 12, 20, etc) [8]. Further layers are required to occupy some of the remaining even frequencies.

The procedure is illustrated in Fig. 1. Each layer, L (1, 2, 3, 4), uses a unique set of subcarriers, which have frequency indices 2(L-1)(2n + 1), where n = {0, 1, 2, 3, …}. Each layer generates a superposition of its subcarriers using an inverse fast Fourier transform (IFFT); then the negative values of this layer’s waveform are clipped to become zero-valued. The spectra of each layer are shown on the left of Fig. 1. Finally, the already-clipped waveforms of all layers are combined to achieve a unipolar signal output (top right spectrum). Importantly, the clipping distortion from higher layers does not fall upon the data-carrying subcarriers in lower layers, thus Layer 1 can be decoded first, using a FFT and a slicer. As shown in the top-middle of Fig. 1, a facsimile of Layer 1’s transmitted waveform can be regenerated with an IFFT and a clipper, and subtracted from the received waveform, to reveal the subcarriers (and clipping distortion) of the higher layers (called W2). Layer 2 is next decoded, and its distortion subtracted from W2, to reveal Layer 3 and 4.

 figure: Fig. 1

Fig. 1 Data-carrying subcarrier allocation in an L/E-ACO-OFDM transmitter (left) and iterative decoding (center) and spectra (right).

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3. EACO transmitter implementation

From Section 2, we can see that several layers are needed in an EACO transmitter to increase the spectral efficiency of ACO. One IFFT module is used in every layer. While more layers are used, more IFFT modules are required, which will cause a significant increase of the logic resource occupation compared with a DCO transmitter, which only requires one IFFT module. In this section, we will show how to optimize the logic resource utilization in the EACO transmitter by taking advantage of its output signal characteristics, followed by an illustration of all the DSP functions implemented in the FPGA.

3.1 IFFT implementation optimization

OFDM can be simply considered as a multicarrier modulation scheme, where its subcarrier frequencies are carefully selected to make sure that each subcarrier is orthogonal to the other subcarriers over one OFDM symbol period. Commonly, an IFFT module is used to achieve modulation and multiplexing digitally in the transmitter. If x(n) represents the OFDM time domain signals over one symbol, we have

x(n)=1Nk=0N1X(k)exp(j2πknN),
where n, k = 0, 1, …, N-1 and X(k) is the input signal of IFFT module. In the first layer, only the odd subcarriers are used to carry data and all the even subcarriers are simply set to zero. Therefore, Eq. (1) can be simplified to
x(n)=1Nk=0N/21X(2k+1)exp(j2π(2k+1)nN).
So,
x(n+N/2)=1Nk=0N/21X(2k+1)exp(j2π(2k+1)(n+N/2)N)=x(n)exp(jπ(2k+1))=x(n),
where n, k = 0, 1, …, N/2-1 [5,7]. For illustration, an 8-point decimation-in-time 2-radix IFFT butterfly chart is shown in Fig. 2; as only the odd subcarriers are used to carry data, all the numbers in the top half (red) are zero except for the numbers x(0-3) in the last stage. However, x(0-3) can be obtained from x(4-7) directly because they just differ in sign. This also explains why the time-domain signals in the EACO’s first layer have half-wave symmetry as Eq. (3). From the perspective of implementation, only the numbers in the bottom half are required to be calculated, so the computational complexity of IFFT module in the first layer is significantly reduced. A similar technique taking advantage of those zero-valued inputs of IFFT module was used without implementation in real hardware [17], there to analyze the computational complexity of augmented spectral efficiency discrete multitone (ASE-DMT).

 figure: Fig. 2

Fig. 2 An 8-point 2-radix decimation-in-time IFFT butterfly flow chart.

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In the second layer of EACO, only even subcarriers are used to carry data. Equation (1) can be simplified to

x(n)=1Nk=0N/21X(2k)exp(j2π2knN)=1Nm=0N/21X(m)exp(j2πmnN/2),
where X(m) = X(2k), m = 0, 1, …, N/2-1. Apparently, X(m) is composed of even subcarriers of X(k), k = 0, 1, …, N-1. And we can also get
x(n+N/2)=1Nm=0N/21X(m)exp(j2πm(n+N/2)N/2)=x(n)exp(j2πm)=x(n),
where n, m = 0, 1, …, N/2-1. In Fig. 2, all the numbers in the bottom half are zero, which is the reason why the time domain signals in the second layer have half-wave symmetry, as per Eq. (5). From the perspective of implementation, only a 4-point IFFT in the top half (see Fig. 2) is required to be calculated. Therefore, the FFT size in the high layers can be reduced by 2(L-1), with L = 1, 2, 3, 4. This simplification method is also analyzed in [7]. As we have discussed in Section 2, not all of the even frequencies are available in the second layer, only the 2 × odd subcarriers (x(2) and x(6) in Fig. 2) are used. From Fig. 2, it is clear that the implementation method used in the first layer can be repeated again since all the numbers in the yellow area are zero. This implementation method also applies to the third, fourth and higher layers.

In short, two methods are used to simplify the implementation of 2-radix IFFT modules in EACO transmitter: a smaller IFFT size can be used in the higher layers, while at the same time only the calculations in the bottom half of butterfly chart are required to be conducted in all the layers. As these two optimization methods do not change the butterfly flow, almost all the pipeline and parallel implementation methods used for conventional 2-radix IFFT implementation can still be used in our implementation without any large modification.

3.2 Transmitter DSP implementation

The spiral FFT/IFFT IP core generator [18,19] can automatically generate customized FFT/IFFT soft IP cores in synthesizable register-transfer level Verilog. These cores have previously been used in some experiments [11,12], in order to verify different DSP algorithms in a real-time optical transmission link. Therefore, for simplicity, this IP core was used to generate the IFFT modules in this experiment. Generally, larger FFT sizes are preferred to reduce the lower cyclic prefix (CP) overhead, which gives robustness to inter symbol interference (ISI). However, the limited logic resources of FPGAs put an upper bound on the FFT size. In this experiment, a 128-point IFFT core was implemented in the first layer. On the basis of the analysis in Section 2, five layers will give 100% of the spectral efficiency of DCO because the DC (0th) subcarrier is usually not used to carry information to avoid DC drift. However, the more layers used, a more complicated iterative receiver is required. Since the fifth layer only adds one data-carrying subcarrier, four layers are adopted in this demonstration. Therefore, the FFT sizes for the four layers were 128, 64, 32, 16, for layers 1 to 4, respectively. The numbers of subcarriers occupied in the layers 1 to 4 were 16, 8, 4, 2, so there were 30 subcarriers in total giving 96.8% (30/31) of the spectral efficiency of DCO-OFDM, with the DC subcarrier excluded.

The FPGA was programmed as follows. It is well known that a larger-radix IFFT can be used to reduce the required number of multipliers. For simplicity, 2-radix IFFT modules are used in all the four layers in this implementation. Firstly, four fully-streaming 2-radix IFFT modules were generated using spiral FFT IP core generator. Then we modified the generated Verilog code to guarantee that only the bottom half in the IFFT butterfly would be calculated. This modification can still be used even if larger-radix IFFTs are used in different layers. Because multipliers dominate the IFFT computation complexity, firstly the required number of multipliers in the IFFT modules for the EACO and DCO transmitters are tabulated in Fig. 3(a). Four IFFT modules in the EACO transmitter require 696 multipliers, which is slightly lower than the 700 multipliers used by one 128-point IFFT module in the DCO transmitter. The reason that EACO uses fewer multipliers is that only 30 subcarriers are used to carry data, making EACO slightly less spectrally efficient than DCO. If a fifth layer is added to take all the subcarriers (except DC subcarrier) to carry data, another 8-point IFFT module requiring 4 multipliers needs to be implemented. In this situation, the total required number of multipliers for IFFT modules in EACO transmitter is 700. That is to say, the required number of multipliers for the IFFT modules in the EACO transmitter is the same as that in a DCO transmitter when they achieve the same spectral efficiency.

 figure: Fig. 3

Fig. 3 (a) Multiplier utilization. (b) Simulated Q-factor versus IFFT resolution.

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After optimizing the implementation of IFFT modules, all the DSP functions of the EACO transmitter were implemented in a FPGA chip. The implemented DSP blocks are shown in Fig. 4. The test data and two training symbols were stored in the FPGA. Every clock cycle, R data bits were mapped to 30 symbols, each with N-bit resolution. R depends on the modulation format on all the subcarriers, with R = 30 × log2(M) for M-QAM, so R = 60 if QPSK modulation is imposed on all the 30 data-carrying subcarriers. Afterwards, these 30 complex numbers, combined with their Hermitian counterparts, were distributed to four layers through a data distribution module.

 figure: Fig. 4

Fig. 4 DSP functions with four fully-streaming IFFT modules implemented in the FPGA.

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The IFFT resolution N needs to be carefully considered as a compromise between computational accuracy and hardware resource utilization. The signals after the set-range and quantization modules were then used to analyze the Q-factor for different IFFT resolutions, and the results are shown in Fig. 3(b). This graph illustrates that a 12-bit IFFT resolution is sufficient to obtain the maximum Q-factor. A higher IFFT resolution cannot increase the Q-factor anymore because at this stage it was mainly limited by the DAC resolution. Therefore, N = 12 bits was used in the FPGA implementation. The real outputs from each of the four IFFT modules were then clipped to remove all negative values individually before the signals were repeated to generate the 128-point outputs.

In addition to multipliers, the addition operations are also required to be implemented. Compared with the DCO transmitter, four 128 12-bit words from four layers need to be added together, which will increase the number of adders by 384 ( = 128 × 3). However, we can reduce this number by taking advantage of the cyclic outputs in Layer 2, 3, and 4. One EACO frame is illustrated in Fig. 5 (a), showing that each layer outputs are streaming in parallel in time domain. The adding procedure of four layers is shown in Fig. 5 (b). Firstly the 32-point output C and D from Layer 3 and 4 were combined and copied to form the 64-point output E. Then E was used to add a 64-point output B from Layer 2 and the results were repeated to give the 128-point output F. Finally, F and the 128-point output A from Layer 1 were added together to form one EACO frame. The whole adding process consumed 224 ( = 32 + 64 + 128) adders. Furthermore, the adders that are used to get the top-half outputs in the last stage of IFFT butterfly, such as x(0-3) shown in Fig. 2, can be eliminated in all the four IFFT modules, saving 120 ( = 64 + 32 + 16 + 8) adders. Therefore, compared with DCO transmitter, EACO transmitter require only 104 ( = 224-120) more adders in the implementation, which is a very small increase.

 figure: Fig. 5

Fig. 5 (a) One EACO-OFDM frame. (b) Four layers adding procedure.

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After being added together, 128 14-bit words were transformed into 128 5-bit words through the set-range and quantization module. Then a 32-sample cyclic prefix (CP) was pre-pended to every OFDM symbol, producing 160 5-bit words which were distributed to 20 high-speed transmitters of the FPGA, representing four 5-bit parallel data streams to feed the MICRAM DAC.

Of the available resources on the Vertix-6 FPGA (XC6VLX240T), the design used 11% of the slice registers (35405), 22% of the slice LUTs (33479) and 79% of the DSP48E1s (612). In the implementation, apart from the multipliers used by IFFT modules, another 128 multipliers were required by the set-range and quantization module. The output signal after set-range and quantization module has the form as

y(n)={αx(n)αx(n)BBαx(n)>B,
where x(n) and y(n) are the input and output signals of the set-range and quantization module. B was the clipping threshold value and was set to 2q −1 for a q-bit DAC. In this experiment, B was 31 as a 5-bit DAC was used. A positive-valued scaling factor α achieved a trade-off between the set-range clipping distortion and quantization error. Theoretically 824 ( = 696 + 128) multipliers had to be implemented, but only 612 (DSP48E1s) multipliers from Virtex-6 FPGA were used. Because that the implementation process was compiled automatically by the Xilinx ISE software, parts of the LUT slices were allocated to do the multiplications instead of using DSP slices.

4. Experimental setup

The experiment setup of EACO transmitter is shown in Fig. 6. A 156.25-MHz clock generated by the DAC provided a clock to the FPGA, which was used to control all the DSP modules in the FPGA and synchronize the FPGA and DAC. Each high-speed FPGA transmitter (GTX) converted 40 parallel streams from FPGA core fabric to 6.25-Gb/s serial signal output. In DAC, every four 6.25-Gb/s signals were further multiplexed to generate a 25-Gb/s bit stream, and the analog output was generated according to these five 25-Gb/s bit inputs. This MICRAM DAC had a resolution of 6 bits, so full operation requires 24 high-speed transmitter channels from the FPGA. However, as there were only 20 high-speed transmitters available on our FPGA evaluation board (ML623), the four inputs corresponding to the least significant bit of DAC were connected to logic zero. The picture of the transmitter setup is shown in Fig. 6(b).

 figure: Fig. 6

Fig. 6 (a) EACO optical transmission link setup. (b) FPGA-based EACO transmitter. (c) Off-line DSP algorithm.

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The peak-to-peak voltage (Vpp) of the DAC analog output signal was 500 mV. The signal was fed through 18-dB attenuators and a DC block, followed by a 24-dB gain 40-GHz linear electrical amplifier (SHF-807). The resulting 1-volt (p-p) output was connected to a distributed feedback (DFB) laser, which was biased at 33 mA. Its threshold current was 13 mA. After transmission over a 20-km span of S-SMF, a variable optical attenuator (VOA) was used to adjust the output optical power, followed by a 16-GHz photodetector (DSC-40S) to convert optical signals to electrical signals, which were then sampled by a real-time Digital Storage Oscilloscope (DSO-X92804A) at 80-GS/s. Finally, the captured samples were analyzed by off-line DSP in MATLAB. The off-line DSP algorithm is illustrated in Fig. 6(c), and is the same as that used in typical OFDM receivers [10]; however, an iterative demodulation algorithm was used to decode the data layer by layer. This algorithm has been discussed in Fig. 1 from Section 2. Some key parameters in the entire transmission link are summarized in Table 1.

Tables Icon

Table 1. Key parameters in the experimental setup.

5. Experimental results

Since 30 subcarriers are used to carry QPSK mapped data, the overall net data rate for this EACO transmitter is 9.375 Gb/s (2 × 25 × 30/160), neglecting an overhead of two training symbols. Firstly, the Q-factor performance for electrical back-to-back configuration (see Fig. 5) was measured by connecting the DAC output directly to a DSO. The captured samples were analyzed by off-line DSP in MATLAB and the results are shown in Fig. 7. As the Q-factors of adjacent-index subcarriers in different layers are very similar, we can conclude that the iterative algorithm in the receiver substantially cancels the clipping distortion.

 figure: Fig. 7

Fig. 7 Q-factors of electrical back-to-back for FPGA-based signal generation.

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Off-line EACO signal generation was also conducted using MATLAB and an arbitrary waveform generator (AWG). All the parameters were the same as the FPGA-based signal generation. Its Q-factors of electrical back-to-back were measured and shown in Fig. 8. A 5-dB Q-factor improvement is seen compared with FPGA-based signal generation. Since increasing the IFFT resolution did not improve the signal quality, as shown in Fig. 3(b), we believe that the reason for this 5-dB Q-factor difference is that the DAC in the AWG has a resolution of 8 bits, which is 3-bits higher than our MICRAM DAC.

 figure: Fig. 8

Fig. 8 Q-factors of electrical back-to-back for off-line signal generation.

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The back-to-back optical link was then evaluated by directly connecting the laser output to a VOA. With no optical attenuation, the optical power received by photodetector is 3.32 dBm and the Q-factor (optical back-to-back) is 19.61 dB, as shown in Fig. 9; a reduction of around 4 dB compared with electrical back-to-back. More specifically, the Q-factors for the low-frequency subcarriers are just 1-dB less than that for electrical back-to-back. We assume that the penalty mainly comes from the laser and photodetector. A 5-dB penalty for the highest-frequency subcarriers, compared with the Q-factor performance of electrical back-to-back, is due to the limitation of the laser’s bandwidth. The normalized power spectra versus frequency for optical back-to-back is shown in Fig. 10. The bandwidth of this EACO signal is 6.25 GHz. We can see that the powers of subcarriers around 6 GHz are a little higher than the lower-index subcarriers due to the relaxation oscillation peak of semiconductor laser. The spectral power above 6.25 GHz is due to the clipping when generating the ACO-OFDM layers, in accordance to the simulation results in [8].

 figure: Fig. 9

Fig. 9 Q-factors of optical back-to-back for FPGA-based signal generation.

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 figure: Fig. 10

Fig. 10 Normalized power versus frequency after the receiver PD for optical back-to-back.

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To investigate the transmission performance considering only the transmission link loss, we adjusted the VOA to attenuate the optical signal and measured the corresponding Q-factors. The results are shown in Fig. 11. When the attenuation is set to 4 dB, the Q-factor is about 19 dB, a reduction of only 0.6 dB. For lower attenuations (1-7 dB), the Q-factor drops very slowly, because the noise power from the transmission link is still very small compared with signal power. When the attenuation is between 8 dB and 12 dB, the transmission link noise reduces the Q-factor by 2 dB for every 1-dB optical power attenuation. At this stage, all the clipping distortion still can be cancelled as the Q-factors for all the four layers are very similar. Signal degradation in higher layers occurs when optical power is attenuated more than 12 dB. The 7% FEC limits corresponding to bit-error-ratio (BER) of 3.8 × 10−3 is plotted in Fig. 11. The receiver sensitivity of PD is −9.68 dBm ( = 3.32 dBm – 13 dB) at a BER of 3.8 × 10−3. When the Q-factor hits this 7% FEC limits, it means that the iterative algorithm in the receiver cannot correctly decode the data in the first layer. These decoded errors from the lower layers will be passed to higher layers, leading to more decoding errors in higher layers, which will significantly increase the overall BER because EACO requires an iterative receiver algorithm, which relies on the previous layer being correctly decoded to remove clipping distortions.

 figure: Fig. 11

Fig. 11 Q-factors for all the four layers versus optical attenuation.

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Finally, the attenuation of VOA was set to zero again when the Q-factor was evaluated after transmission over 20-km S-SMF. Without using any optical amplifier, the Q-factor calculated from the average BER is still above 14 dB as shown in Fig. 12. The optical power received by photodetector is −1.96 dBm, so the total link loss is around 5.3 dB including around 1-dB loss from optical fiber connectors and around 4-dB loss for the 20-km S-SMF. The Q-factors for the lower-index subcarriers after transmission over 20-km S-SMF is reduced around 1 dB compared with optical back-to-back, which is in accordance with the reduction of Q-factor corresponding to the 5-dB attenuation shown in Fig. 11. Note, after transmission over 20-km S-SMF, the higher-index subcarriers suffer a larger penalty of 10 dB, compared with the low-frequency subcarriers.

 figure: Fig. 12

Fig. 12 Q-factors after 20-km transmission for FPGA-based signal generation.

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The signal power spectra after 20-km transmission are shown in Fig. 13. It shows that the subcarriers above 2 GHz suffer from reduced powers. The signal power in the 4 GHz drops around 5 dB compared with the near DC frequency, which explains why the subcarriers adjacent to the 20th subcarrier suffer a 5-dB penalty compared with the lower-index subcarriers as was shown in Fig. 12(b).

 figure: Fig. 13

Fig. 13 Normalized power versus frequency after the receiver PD for 20-km transmission.

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6. Conclusions

In this paper, a FPGA-based EACO transmitter with a net data rate up to 9.375 Gb/s has been experimentally demonstrated in a DML-based short-haul optic-fiber link. Although the EACO transmitter requires more-complex DSP compared with DCO transmitters, its implementation requires almost the same amount of logic resources as that for DCO. Because our implementation method does not change the regularity of traditional IFFT butterfly flow, most of the implementation strategies used for traditional IFFT can also be used in our EACO implementation. The same implementation method can also be used in the clipping noise regeneration modules in the receiver. By using off-line DSP in the receiver, this EACO signal has been successfully transmitted over a 20-km span of S-SMF without using any optical amplifiers. The receiver DSP algorithm implementation in the FPGA will be addressed in future work.

Funding

Australian Research Council’s Laureate Fellowship (FL130100041); ARC Centre of Excellence for Ultrahigh bandwidth Devices for Optical Systems (CUDOS) (CE110001018).

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Figures (13)

Fig. 1
Fig. 1 Data-carrying subcarrier allocation in an L/E-ACO-OFDM transmitter (left) and iterative decoding (center) and spectra (right).
Fig. 2
Fig. 2 An 8-point 2-radix decimation-in-time IFFT butterfly flow chart.
Fig. 3
Fig. 3 (a) Multiplier utilization. (b) Simulated Q-factor versus IFFT resolution.
Fig. 4
Fig. 4 DSP functions with four fully-streaming IFFT modules implemented in the FPGA.
Fig. 5
Fig. 5 (a) One EACO-OFDM frame. (b) Four layers adding procedure.
Fig. 6
Fig. 6 (a) EACO optical transmission link setup. (b) FPGA-based EACO transmitter. (c) Off-line DSP algorithm.
Fig. 7
Fig. 7 Q-factors of electrical back-to-back for FPGA-based signal generation.
Fig. 8
Fig. 8 Q-factors of electrical back-to-back for off-line signal generation.
Fig. 9
Fig. 9 Q-factors of optical back-to-back for FPGA-based signal generation.
Fig. 10
Fig. 10 Normalized power versus frequency after the receiver PD for optical back-to-back.
Fig. 11
Fig. 11 Q-factors for all the four layers versus optical attenuation.
Fig. 12
Fig. 12 Q-factors after 20-km transmission for FPGA-based signal generation.
Fig. 13
Fig. 13 Normalized power versus frequency after the receiver PD for 20-km transmission.

Tables (1)

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Table 1 Key parameters in the experimental setup.

Equations (6)

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x( n )= 1 N k=0 N1 X( k )exp( j2πkn N ) ,
x( n )= 1 N k=0 N/21 X( 2k+1 ) exp( j2π(2k+1)n N ).
x( n+N/2 )= 1 N k=0 N/21 X ( 2k+1 )exp( j2π(2k+1)(n+N/2) N ) =x( n )exp( jπ( 2k+1 ) ) =x( n ),
x( n )= 1 N k=0 N/21 X ( 2k )exp( j2π2kn N ) = 1 N m=0 N/21 X( m ) exp( j2πmn N/2 ),
x( n+N/2 )= 1 N m=0 N/21 X( m ) exp( j2πm(n+N/2) N/2 ) =x( n )exp( j2πm ) =x( n ),
y( n )={ αx( n )αx( n )B Bαx( n )>B ,
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