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Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors: comment

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Abstract

A potential erroneous and misleading result which is caused by the wrong calculation of current density and transconductance was found in a paper, namely [Opt. Express 22, A1589 (2014)]. After checking the calculation, this paper points out the contradictory results existing in the MOSFET gate width as regards its actual layout and inconsistent I-V characteristics. Judging from the calculation result, we estimate that the author may confuse gate length with gate width in the calculation. Considering the author was conducting an interdisciplinary research and demonstrating a novel device design, these calculation errors may be trivial and comprehensible. But we still suggest that the author can make their work more accurate and comparable with other monolithic integration works by correcting the existing calculation errors.

© 2017 Optical Society of America under the terms of the OSA Open Access Publishing Agreement

1. Introduction

The current density and transconductance of a transistor which is monolithically integrated with a GaN LED indicate the current drive ability of the transistor itself. So it is critical to conduct a correct calculation of those two parameters [1] to be fairly compared with other research works. In this comment, we point out some calculation errors and potentially contradictory results in [2] which may be caused by confusing gate width with gate length and suggest that the author can correct them and make their work more accurate and comparable.

2. Current density calculation

According to Fig. 3, the I-V characteristics of the monolithically integrated LED/MOSFET in [2], we can find that at VDS = 6 V, IDS = 1050 mA/mm. At the same time, the on resistance of the transistor is extracted to be Ron = 105 Ω. So we can calculate that the drain current at VDS = 6 V is 6 V/105 Ω = 57.14 mA. Since the MOSFET current density can be given as IDS/Wg (Here, Wg is the gate width of the transistor [3]), the gate width of the MOSFET is 57.14 mA/ (1050 mA/mm) = 54 µm. Judging from the Fig. 2(a) in [2], the scale bar is 100 µm which is matched with the claimed LED diameter of 300 µm but not matched with the calculated transistor gate width of 54 µm. From the SEM image of the integrated device, we can see that the LED is surrounded by the MOSFET which has a circular-shaped gate (diameter~420 µm). So the gate width should be around 1320 µm. This is not consistent with the I-V characteristics. In this way, the gm result of 368 mS/mm is also questionable.

Judging from the SEM image in [2], the MOSFET gate length is around 50 µm. So we estimate that the author may confuse the definition of gate width with the one of gate length. As shown in Fig. 1, gate length means the size of gate along the direction from drain to source, while gate width is the size of gate in another dimension. So if the author used gate width to calculate current density and transconductance, the result will be 38.74 mA/mm and 15.05 mS/mm, which becomes much smaller, but more reasonable for MOSFET considering its doping level and carrier mobility.

 figure: Fig. 1

Fig. 1 Schematic to illustrate MOSFET gate length and gate width definition.

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3. Inconsistent I-V characteristics

From the Fig. 5(b) given by [2], we can see that, at VGS = 1 V, IDS = 16 mA when VDD = 7 V and IDS = 26 mA when VDD = 15 V. But from Fig. 5(a) in [2], we can see that, at VGS = 1V, VDD = 7 V, IDS = 3 mA and at VGS = 1 V, VDD = 15 V, IDS = 15 mA. So Figs. 5(a) and 5(b) in [2] are inconsistent if they were the same device.

4. Concluding remarks

The author may misunderstand the definition of gate width and gate length, resulting in a wrong calculation of the transistor’s current density and transconductance. It is easy to misunderstand this electronic concept for a photonic researcher when conducting an interdisciplinary research. In addition, what the author was trying to demonstrate is a new concept of monolithic integration of MOSFET with LED, so the calculation errors may be trivial and comprehensible. But correcting those errors can make this work more accurate and less misleading when comparing the transistor’s current drive ability in this work with the one in other monolithic integration works. So we still strongly suggest the author to correct these errors.

References and links

1. University of California, Berkeley, “MOSFET technology scaling, leakage current, and other topics”, http://inst.eecs.berkeley.edu/~ee130/sp06/chp7full.pdf.

2. Y. J. Lee, Z. P. Yang, P. G. Chen, Y. A. Hsieh, Y. C. Yao, M. H. Liao, M. H. Lee, M. T. Wang, and J. M. Hwang, “Monolithic integration of GaN-based light-emitting diodes and metal-oxide-semiconductor field-effect transistors,” Opt. Express 22(106Suppl 6), A1589–A1595 (2014). [PubMed]  

3. C. M. Lee and B. Y. Tsui, “High-performance poly-Si nanowire thin-film transistors using the HfO2 gate dielectric,” IEEE Electron Device Lett. 32(3), 327–329 (2011).

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Figures (1)

Fig. 1
Fig. 1 Schematic to illustrate MOSFET gate length and gate width definition.
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