Abstract
It has been observed that the fundamental physical limit on communication rates between silicon CMOS chips may be lower than 1 THz for conventional metal lines of lengths - 10cm. This bandwidth limit scales as the aspect ratio (the ratio of total cross-sectional area to length) of the interconnect1. Since the off-chip bandwidth requirement of silicon ASICs is predicted to increase beyond 1 THz within five years, a potential bottleneck in computational performance can be foreseen. Free space optoelectronic connections show promise in overcoming the predicted bottleneck since they offer high spatial density connections (>106 per cm2) free of the aspect-ratio problem and many other limitations of electrical interconnections2.
© 1998 IEEE
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