Abstract

Optical interconnect technology has demonstrated technical and commercial success for long-haul and local area network communications. Migration of optical interconnects into computing systems is being driven by increasing circuit device speeds and architectural complexity needed to realize high performance computers. For present computing architectures, data and clock distribution are examples of interconnect bottlenecks where there is an immediate payoff from using optical interconnects at the small area, board-to-board and chip-to-chip level. For future systems, hardware density and speed will be enhanced by utilizing the high density potential of optical interconnects. We present potential advantages and limitations that optical interconnects exhibit for computing implementations. In addition, we discuss packaging issues (e.g., reliability, testability, and compatibility) essential for implementing optical interconnect in computing hardware environments and present results of an optical chip-to-chip demonstration.

© 1986 Optical Society of America