Abstract

D-STOP is a parallel, scalable, fully connected optoelectronic computing architecture suitable for applications in interconnection networks, numerical processing, neural networks, and artificial intelligence. The architecture consists of an array of N optoelectronic processing elements arranged in a 2-D topology. Each processing element consists of N electronic processing sub-units having detectors. These detector sub-units are electronically connected by an H-tree interconnection. At each node of the H-tree are additional fan-in processing sub-units. At the center of the H-tree is a single processing sub-unit having an optical modulator. Fully connected interprocessor communication is achieved through space-invariant optical interconnections, leading to a scalable architecture. The architecture can be used to perform outer product and inner product operations. Since all mathematical operations are performed electronically, the products can be generalized. Additional processing is available during fan-in, generalizing the conventional summation of inner products. This feature is particularly useful in neural network applications, including backpropagation networks. The key to the architecture is the dual scale of processing: detector and fan-in sub-units at the lower level and composite processing elements at the higher level. We will present the architecture, its functionality, applications, and optoelectronic design considerations.

© 1990 Optical Society of America