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Free-space optical shared CAM processor: its architectures, applications, and limitations

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Abstract

Content-address-able memory (CAM) architectures have been proposed to handle various logic, arithmetic, and database operations in digital computation. An electronic CAM is usually based on a programmable logic array which does not permit multiple concurrent access due to the conductive guiding nature of the electronic signals. The existing coherent and incoherent optical CAM processors were all based on optical vector-matrix multipliers which also exclude such an important concurrent multiple memory access. In this talk, a free-space shared-CAM (SCAM) architecture is proposed which spatially multiplexes and demultiplexes the multiple input and output signals, respectively, for a set of completely parallel accesses to the identical CAM storage space. Instead of using either a space-variant holographic scheme or an nonlinear four-wave-mixing approach based on signal degeneracy for a required optical matrix multiplication, strictly space-invariant conventional optical component based system is suggested. The designed optical system is statistically analyzed by propagating its error probability from the input source array, through the memory matrix, to the output array. The memory density and its sharing capacity are estimated in order to deliver a high quality performance specified by a low cross-talk related error rate (10-15). Power consumptions of the proposed S-CAM for its maximum access capacity and at a range of clock speeds (100 MHz -1 GHz) are also calculated. The proposed optical S-CAM is expected to find its usage in many digital computation applications under a single instruction and multiple-data (SIMD) environment. Some proof-of principle experiments based on a pair of ferroelectric liquid crystal optical switch arrays were performed, their results will be presented.

© 1993 Optical Society of America

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