Abstract

Smart Pixel based free-space optical interconnects offer a method of establishing high connection densities, and subsequently large data throughputs, in applications such as ATM networks, massively parallel computers, and photonic backplanes. The design of these optical systems require a means of quantifying the trade-offs between the effective processing power of a Smart Pixel array and the optical interconnection geometry [1,2,3]. In fight of this interest, we have developed a simple model which outlines the trade-offs between optical connection density and Smart Pixel intelligence. The objective of the model is to define a reasonable operating region where the following parameters are optimized: the number of transistors per Smart Pixel, the optoelectronic device window size, the lenslet size, the f/number of the lenslet, and the optical connection density.

© 1995 Optical Society of America